NGE_SET
soft_misc.misc_bits.rx_clk_vx_rst = NGE_SET;
soft_misc.misc_bits.tx_clk_vx_rst = NGE_SET;
soft_misc.misc_bits.clk12m_vx_rst = NGE_SET;
soft_misc.misc_bits.fpci_clk_vx_rst = NGE_SET;
soft_misc.misc_bits.rx_clk_vc_rst = NGE_SET;
soft_misc.misc_bits.tx_clk_vc_rst = NGE_SET;
soft_misc.misc_bits.fs_clk_vc_rst = NGE_SET;
soft_misc.misc_bits.rst_ex_m2pintf = NGE_SET;
pmu_cntl2.cntl2_bits.cidle_timer = NGE_SET;
pmu_cntl2.cntl2_bits.didle_timer = NGE_SET;
pmu_cntl2.cntl2_bits.core_enable = NGE_SET;
pmu_cntl2.cntl2_bits.dev_enable = NGE_SET;
mii_cs.cs_bits.ap_en = NGE_SET;
tx_cntl.cntl_bits.paen = NGE_SET;
tx_cntl.cntl_bits.retry_en = NGE_SET;
tx_cntl.cntl_bits.pad_en = NGE_SET;
tx_cntl.cntl_bits.fappend_en = NGE_SET;
tx_cntl.cntl_bits.two_def_en = NGE_SET;
tx_cntl.cntl_bits.exdef_mask = NGE_SET;
tx_cntl.cntl_bits.lcar_mask = NGE_SET;
tx_cntl.cntl_bits.tlcol_mask = NGE_SET;
tx_cntl.cntl_bits.uflo_err_mask = NGE_SET;
rx_cntl0.cntl_bits.paen = NGE_SET;
rx_cntl0.cntl_bits.afen = NGE_SET;
tx_en.bits.tx_en = NGE_SET;
rx_en.bits.rx_en = NGE_SET;
swtr_cntl.cntl_bits.sten = NGE_SET;
swtr_cntl.cntl_bits.stren = NGE_SET;
mintr_mask.mask_bits.mapi = NGE_SET;
mintr_mask.mask_bits.mpdi = NGE_SET;
intr_mask.mask_bits.reint = NGE_SET;
intr_mask.mask_bits.rcint = NGE_SET;
intr_mask.mask_bits.miss = NGE_SET;
intr_mask.mask_bits.teint = NGE_SET;
intr_mask.mask_bits.tfint = NGE_SET;
intr_mask.mask_bits.feint = NGE_SET;
rx_cntl.cntl_bits.brdis = NGE_SET;
rx_cntl.cntl_bits.afen = NGE_SET;
m2p.m2p_bits.hdup_en = NGE_SET;
rx_cntl0.cntl_bits.paen = NGE_SET;
if (rx_cntl0.cntl_bits.paen == NGE_SET) {
tx_cntl.cntl_bits.paen = NGE_SET;
if (tx_cntl.cntl_bits.paen == NGE_SET) {
intr_mask.mask_bits.stint = NGE_SET;
interbus_conf.conf_bits.msix_off = NGE_SET;
cap_conf.map_cap_conf_bits.map_en = NGE_SET;
interbus_conf.conf_bits.msi_off = NGE_SET;
mode.mode_bits.dma_dis = NGE_SET;
if (mode.mode_bits.dma_status == NGE_SET)
mode.mode_bits.bm_reset = NGE_SET;
mode.mode_bits.tx_rcom_en = NGE_SET;
rx_poll.poll_bits.rpen = NGE_SET;
mode_cntl.mode_bits.rx_sum_en = NGE_SET;
mode_cntl.mode_bits.w64_dis = NGE_SET;
mode_cntl.mode_bits.tx_fetch_prd = NGE_SET;
mode_cntl.mode_bits.rx_fetch_prd = NGE_SET;
mode_cntl.mode_bits.rxdm = NGE_SET;
mode_cntl.mode_bits.tx_rcom_en = NGE_SET;
msi_mask.msi_msk_bits.vec0 = NGE_SET;
msi_mask.msi_msk_bits.vec1 = NGE_SET;
msi_mask.msi_msk_bits.vec2 = NGE_SET;
msi_mask.msi_msk_bits.vec3 = NGE_SET;
msi_mask.msi_msk_bits.vec4 = NGE_SET;
msi_mask.msi_msk_bits.vec5 = NGE_SET;
msi_mask.msi_msk_bits.vec6 = NGE_SET;
msi_mask.msi_msk_bits.vec7 = NGE_SET;
DDI_PROP_DONTPASS, intr_moderation, NGE_SET);
mode_cntl.mode_bits.rxdm = NGE_SET;
mode_cntl.mode_bits.tx_rcom_en = NGE_SET;
hw_bd_p->cntl_status.control_bits.own = NGE_SET;
hw_bd_p->cntl_status.control_bits.own = NGE_SET;
mode_cntl.mode_bits.txdm = NGE_SET;
mode_cntl.mode_bits.tx_rcom_en = NGE_SET;
= NGE_SET;
= NGE_SET;
hw_sbd_p->control_status.control_sum_bits.inten = NGE_SET;
hw_sbd_p->control_status.control_sum_bits.end = NGE_SET;
hw_sbd_p->control_status.control_sum_bits.own = NGE_SET;
= NGE_SET;
= NGE_SET;
hw_sbd_p->control_status.control_sum_bits.inten = NGE_SET;
hw_sbd_p->control_status.control_sum_bits.end = NGE_SET;
hw_sbd_p->control_status.control_sum_bits.own = NGE_SET;
if (intr_src.src_bits.mrei == NGE_SET)
mdio_adr.adr_bits.mdio_clc = NGE_SET;