MSR_AMD_HWCR
if (cmi_hdl_rdmsr(hdl, MSR_AMD_HWCR, &hwcr) != CMI_SUCCESS)
(void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr);
(void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr);
if (cmi_hdl_rdmsr(hdl, MSR_AMD_HWCR, &hwcr) != CMI_SUCCESS)
(void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr);
(void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr);
if (((rdmsr(MSR_AMD_HWCR) & AMD_HWCR_TLBCACHEDIS) == 0) ||
(((rdmsr(MSR_AMD_HWCR) & AMD_HWCR_TLBCACHEDIS) == 0) ||
const uint_t msr = MSR_AMD_HWCR;