MS1
{ /* MS_COUNTER2 */ 0x306, 0x366, MS1|TBPU1|TC1 },
{ /* MS_COUNTER3 */ 0x307, 0x367, MS1|TBPU1|TC1 },
{ "tc_ms_xfer", MS0|MS1, 0x1, 0x5, 0x0, C(4)|C(5)|C(6)|C(7) },
{ "uop_queue_writes", MS0|MS1, 0x7, 0x9, 0x0, C(4)|C(5)|C(6)|C(7) },