Symbol: MISC_REG_CPMU_LP_FW_ENABLE_P0
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3245
REG_WR(cb, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), 0);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7381
REG_WR(cb, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2),
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7434
REG_WR(cb, MISC_REG_CPMU_LP_FW_ENABLE_P0 +