MISC_REG_AEU_ENABLE4_NIG_0
{ MISC_REG_AEU_ENABLE4_NIG_0,
val = REG_RD(pdev, MISC_REG_AEU_ENABLE4_NIG_0);
REG_WR(pdev, MISC_REG_AEU_ENABLE4_NIG_0, val);