Symbol: MII_CONTROL_RESET
usr/src/uts/common/io/atge/atge_mii.c
198
atge_mii_write(atgep, phyaddr, MII_CONTROL, MII_CONTROL_RESET);
usr/src/uts/common/io/atge/atge_mii.c
224
MII_CONTROL_RESET | MII_CONTROL_ANE | MII_CONTROL_RSAN);
usr/src/uts/common/io/atge/atge_mii.c
376
if ((val & MII_CONTROL_RESET) == 0) {
usr/src/uts/common/io/atge/atge_mii.c
378
atge_mii_write(arg, phy, reg, val | MII_CONTROL_RESET);
usr/src/uts/common/io/bfe/bfe.c
376
bfe_write_phy(bfe, MII_CONTROL, MII_CONTROL_RESET);
usr/src/uts/common/io/bfe/bfe.c
380
MII_CONTROL_RESET) {
usr/src/uts/common/io/bge/bge_mii.c
256
bge_mii_put16(bgep, MII_CONTROL, MII_CONTROL_RESET);
usr/src/uts/common/io/bge/bge_mii.c
260
if (BIC(control, MII_CONTROL_RESET))
usr/src/uts/common/io/mii/mii.c
1096
PHY_SET(ph, MII_CONTROL, MII_CONTROL_RESET);
usr/src/uts/common/io/mii/mii.c
1115
if ((phy_read(ph, MII_CONTROL) & MII_CONTROL_RESET) == 0) {
usr/src/uts/common/io/mii/mii_marvell.c
194
reg |= MII_CONTROL_RESET;
usr/src/uts/common/io/mxfe/mxfe.c
1314
mxfe_miiwrite(mxfep, phyaddr, MII_CONTROL, MII_CONTROL_RESET);
usr/src/uts/common/io/mxfe/mxfe.c
1322
MII_CONTROL_RESET) {
usr/src/uts/common/io/nge/nge_xmii.c
240
control |= MII_CONTROL_RESET;
usr/src/uts/common/io/nge/nge_xmii.c
247
if (BIC(control, MII_CONTROL_RESET))
usr/src/uts/common/io/rge/rge_chip.c
321
rge_mii_put16(rgep, MII_CONTROL, control | MII_CONTROL_RESET);
usr/src/uts/common/io/rge/rge_chip.c
325
if (BIC(control, MII_CONTROL_RESET))
usr/src/uts/common/io/sfe/sfe_util.c
2289
if (val & MII_CONTROL_RESET) {
usr/src/uts/common/io/sfe/sfe_util.c
2779
gem_mii_write(dp, MII_CONTROL, MII_CONTROL_RESET);
usr/src/uts/common/io/sfe/sfe_util.c
2793
~(MII_CONTROL_ISOLATE | MII_CONTROL_PWRDN | MII_CONTROL_RESET);
usr/src/uts/common/io/usbgem/usbgem.c
1289
if (val & MII_CONTROL_RESET) {
usr/src/uts/common/io/usbgem/usbgem.c
1838
usbgem_mii_write(dp, MII_CONTROL, MII_CONTROL_RESET, &err);
usr/src/uts/common/io/usbgem/usbgem.c
1855
~(MII_CONTROL_ISOLATE | MII_CONTROL_PWRDN | MII_CONTROL_RESET);
usr/src/uts/intel/io/dnet/dnet_mii.c
302
phyd->control | MII_CONTROL_RESET);
usr/src/uts/intel/io/dnet/dnet_mii.c
314
if (!(control & MII_CONTROL_RESET))
usr/src/uts/intel/io/dnet/dnet_mii.c
325
if (!(control & MII_CONTROL_RESET))