usr/src/uts/common/io/bfe/bfe.c

685

bmcr = (MII_CONTROL_100MB | MII_CONTROL_FDUPLEX);

usr/src/uts/common/io/bfe/bfe.c

687

bmcr = MII_CONTROL_100MB;

usr/src/uts/common/io/bfe/bfe.c

770

if (bmcr & MII_CONTROL_100MB)

usr/src/uts/common/io/bge/bge_mii.c

1047

control |= MII_CONTROL_100MB|MII_CONTROL_FDUPLEX;

usr/src/uts/common/io/bge/bge_mii.c

1049

control |= MII_CONTROL_100MB;

usr/src/uts/common/io/mii/mii.c

1170

bmcr |= MII_CONTROL_100MB | MII_CONTROL_FDUPLEX;

usr/src/uts/common/io/mii/mii.c

1185

bmcr = MII_CONTROL_100MB | MII_CONTROL_FDUPLEX;

usr/src/uts/common/io/mii/mii.c

1288

bmcr |= MII_CONTROL_100MB;

usr/src/uts/common/io/mii/mii.c

1450

} else if (control & MII_CONTROL_100MB) {

usr/src/uts/common/io/mxfe/mxfe.c

1410

bmcr = (MII_CONTROL_100MB | MII_CONTROL_FDUPLEX);

usr/src/uts/common/io/mxfe/mxfe.c

1412

bmcr = MII_CONTROL_100MB;

usr/src/uts/common/io/mxfe/mxfe.c

1520

if (bmcr & MII_CONTROL_100MB) {

usr/src/uts/common/io/nge/nge_xmii.c

427

control |= MII_CONTROL_100MB|MII_CONTROL_FDUPLEX;

usr/src/uts/common/io/nge/nge_xmii.c

429

control |= MII_CONTROL_100MB;

usr/src/uts/common/io/rge/rge_chip.c

474

control |= MII_CONTROL_100MB|MII_CONTROL_FDUPLEX;

usr/src/uts/common/io/rge/rge_chip.c

476

control |= MII_CONTROL_100MB;

usr/src/uts/common/io/sfe/sfe_util.c

2540

dp->speed = (val & MII_CONTROL_100MB) ?

usr/src/uts/common/io/sfe/sfe_util.c

2597

val |= MII_CONTROL_100MB;

usr/src/uts/common/io/usbgem/usbgem.c

1560

dp->speed = (val & MII_CONTROL_100MB) ?

usr/src/uts/common/io/usbgem/usbgem.c

1622

val |= MII_CONTROL_100MB;

usr/src/uts/common/io/vr/vr.c

2688

vrp->chip.mii.control |= MII_CONTROL_100MB;

usr/src/uts/common/io/vr/vr.c

2692

vrp->chip.mii.control |= MII_CONTROL_100MB;

usr/src/uts/common/io/vr/vr.c

2697

vrp->chip.mii.control &= ~MII_CONTROL_100MB;

usr/src/uts/common/io/vr/vr.c

2699

vrp->chip.mii.control &= ~MII_CONTROL_100MB;

usr/src/uts/common/io/vr/vr.c

2790

if ((vrp->chip.mii.control & MII_CONTROL_100MB) != 0) {

usr/src/uts/common/io/vr/vr.c

780

(MII_CONTROL_100MB | MII_CONTROL_FDUPLEX);

usr/src/uts/intel/io/dnet/dnet_mii.c

498

*speed = phyd->control & MII_CONTROL_100MB ? 100:10;

usr/src/uts/intel/io/dnet/dnet_mii.c

529

phyd->control |= MII_CONTROL_100MB;

usr/src/uts/intel/io/dnet/dnet_mii.c

531

phyd->control &= ~MII_CONTROL_100MB;