MII_ABILITY_PAUSE
v = (bfe->bfe_mii_anar & MII_ABILITY_PAUSE) != 0;
v = (bfe->bfe_mii_anlpar & MII_ABILITY_PAUSE) != 0;
anar |= MII_ABILITY_PAUSE;
bgep->param_lp_pause = BIS(aux, MII_ABILITY_PAUSE);
#define MII_ABILITY_PAUSE (3<<7) /* RO */ /* Reset:0x3 */
miireg &= MII_ABILITY_PAUSE;
anar |= MII_ABILITY_PAUSE;
ph->phy_lp_pause = !!(lpar & MII_ABILITY_PAUSE);
anar |= MII_ABILITY_PAUSE;
anar |= MII_ABILITY_PAUSE;
MII_ABILITY_PAUSE | \
((((x) & MII_ABILITY_PAUSE) ? 1 : 0) | \
MII_ABILITY_PAUSE, /* symmetric */
MII_ABILITY_PAUSE | MII_ABILITY_ASMPAUSE, /* rx-symmetric */
MII_ABILITY_PAUSE | MII_ABILITY_ASMPAUSE);
if ((adv & MII_ABILITY_PAUSE) == 0) {
val = BOOLEAN(dp->mii_lpable & MII_ABILITY_PAUSE);
val = BOOLEAN(dp->mii_lpable & MII_ABILITY_PAUSE);
((((x) & MII_ABILITY_PAUSE) != 0 ? 1 : 0) | \
val |= MII_ABILITY_PAUSE;
MII_ABILITY_PAUSE | MII_ABILITY_ASM_DIR, &err);
if ((adv & MII_ABILITY_PAUSE) == 0) {
val = BOOLEAN(dp->mii_lpable & MII_ABILITY_PAUSE);
#ifndef MII_ABILITY_PAUSE
MII_ABILITY_PAUSE | \
v = (vrp->chip.mii.anadv & MII_ABILITY_PAUSE) != 0;
v = (vrp->chip.mii.lpable & MII_ABILITY_PAUSE) != 0;
if ((mask & MII_ABILITY_PAUSE) != 0 &&
vrp->param.anadv_en &= ~MII_ABILITY_PAUSE;
vrp->param.anadv_en |= MII_ABILITY_PAUSE;
vrp->param.anadv_en |= MII_ABILITY_PAUSE;