usr/src/uts/intel/io/mc-amd/mcamd_drv.c

217

MCREG_FIELD_F_preF(&nbcfg, EccEn) :

usr/src/uts/intel/io/mc-amd/mcamd_drv.c

230

MCREG_FIELD_F_preF(&nbcfg, ChipKillEccEn) :

usr/src/uts/intel/io/mc-amd/mcamd_drv.c

815

wide = MCREG_FIELD_F_preF(&drcfg_lo, Width128);

usr/src/uts/intel/io/mc-amd/mcamd_drv.c

829

mcp->mcp_mod64mux = MCREG_FIELD_F_preF(&drcfg_lo, Mod64BitMux);

usr/src/uts/intel/io/mc-amd/mcamd_drv.c

848

MCREG_FIELD_F_preF(&baddrmap, BankSwizzleMode);

usr/src/uts/intel/io/mc-amd/mcamd_drv.c

882

csbe = MCREG_FIELD_F_preF(&base[i], CSEnable);

usr/src/uts/intel/sys/mc_amd.h

450

(uint64_t)MCREG_FIELD_F_preF(up, BaseAddrHi) << 25 | \

usr/src/uts/intel/sys/mc_amd.h

451

(uint64_t)MCREG_FIELD_F_preF(up, BaseAddrLo) << 13)

usr/src/uts/intel/sys/mc_amd.h

492

(uint64_t)MCREG_FIELD_F_preF(up, AddrMaskHi) << 25 | \

usr/src/uts/intel/sys/mc_amd.h

493

(uint64_t)MCREG_FIELD_F_preF(up, AddrMaskLo) << 13 | 0x1f01fff)