Symbol: MAX_CPU_NODES
usr/src/uts/i86pc/cpu/genuineintel/gintel_main.c
535
if (chipid < MAX_CPU_NODES) {
usr/src/uts/i86pc/cpu/genuineintel/gintel_main.c
55
uint32_t err_counter_array[MAX_CPU_NODES][ERR_COUNTER_INDEX][N_MC_COR_ECC_CNT];
usr/src/uts/i86pc/cpu/genuineintel/gintel_main.c
56
uint8_t err_counter_index[MAX_CPU_NODES];
usr/src/uts/intel/io/intel_nhm/dimm_topo.c
51
extern nvlist_t *inhm_mc_nvl[MAX_CPU_NODES];
usr/src/uts/intel/io/intel_nhm/dimm_topo.c
54
extern char lockstep[MAX_CPU_NODES];
usr/src/uts/intel/io/intel_nhm/dimm_topo.c
55
extern char mirror_mode[MAX_CPU_NODES];
usr/src/uts/intel/io/intel_nhm/dimm_topo.c
56
extern char spare_channel[MAX_CPU_NODES];
usr/src/uts/intel/io/intel_nhm/intel_nhm.h
216
#define MAX_MEMORY_CONTROLLERS MAX_CPU_NODES
usr/src/uts/intel/io/intel_nhm/intel_nhmdrv.c
103
for (i = 0; i < MAX_CPU_NODES; i++) {
usr/src/uts/intel/io/intel_nhm/intel_nhmdrv.c
128
chip = getminor(dev) % MAX_CPU_NODES;
usr/src/uts/intel/io/intel_nhm/intel_nhmdrv.c
202
for (i = 0; i < MAX_CPU_NODES; i++) {
usr/src/uts/intel/io/intel_nhm/intel_nhmdrv.c
259
if (getminor(*devp) >= MAX_CPU_NODES) {
usr/src/uts/intel/io/intel_nhm/intel_nhmdrv.c
53
nvlist_t *inhm_mc_nvl[MAX_CPU_NODES];
usr/src/uts/intel/io/intel_nhm/intel_nhmdrv.c
56
char *inhm_mc_snapshot[MAX_CPU_NODES];
usr/src/uts/intel/io/intel_nhm/intel_nhmdrv.c
59
size_t inhm_mc_snapshotsz[MAX_CPU_NODES];
usr/src/uts/intel/io/intel_nhm/intel_nhmdrv.c
84
for (i = 0; i < MAX_CPU_NODES; i++) {
usr/src/uts/intel/io/intel_nhm/mem_addr.c
43
tad_t tad[MAX_CPU_NODES][MAX_TAD_DRAM_RULE];
usr/src/uts/intel/io/intel_nhm/mem_addr.c
44
sag_ch_t sag_ch[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
usr/src/uts/intel/io/intel_nhm/mem_addr.c
46
rir_t rir[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
usr/src/uts/intel/io/intel_nhm/mem_addr.c
48
dod_t dod_reg[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
usr/src/uts/intel/io/intel_nhm/mem_addr.c
811
last = MAX_CPU_NODES;
usr/src/uts/intel/io/intel_nhm/mem_addr.h
61
extern tad_t tad[MAX_CPU_NODES][MAX_TAD_DRAM_RULE];
usr/src/uts/intel/io/intel_nhm/mem_addr.h
62
extern sag_ch_t sag_ch[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
usr/src/uts/intel/io/intel_nhm/mem_addr.h
64
extern rir_t rir[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
usr/src/uts/intel/io/intel_nhm/mem_addr.h
66
extern dod_t dod_reg[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
usr/src/uts/intel/io/intel_nhm/nhm_init.c
328
for (slot = 0; slot < MAX_CPU_NODES; slot++) {
usr/src/uts/intel/io/intel_nhm/nhm_init.c
334
if (slot == MAX_CPU_NODES) {
usr/src/uts/intel/io/intel_nhm/nhm_pci_cfg.c
101
ASSERT(slot >= 0 && slot < MAX_CPU_NODES);
usr/src/uts/intel/io/intel_nhm/nhm_pci_cfg.c
44
static ddi_acc_handle_t dev_pci_hdl[MAX_CPU_NODES][CPU_PCI_DEVS][CPU_PCI_FUNCS];
usr/src/uts/intel/io/intel_nhm/nhm_pci_cfg.c
56
for (i = 0; i < MAX_CPU_NODES; i++) {
usr/src/uts/intel/io/intel_nhm/nhm_pci_cfg.c
83
for (i = 0; i < MAX_CPU_NODES; i++) {
usr/src/uts/intel/io/intel_nhm/nhm_pci_cfg.c
98
if (bus >= SOCKET_BUS(MAX_CPU_NODES) && bus <= SOCKET_BUS(0) &&