MAKEMASK
#define IXGBE_ACI_FEC_MASK MAKEMASK(0x7, 0)
#define IXGBE_ACI_NVM_ACTIV_SEL_MASK MAKEMASK(0x7, 3)
#define IXGBE_ACI_NVM_RESET_LVL_M MAKEMASK(0x3, 0) /* Write reply only */
#define IXGBE_ACI_NVM_EMP_SR_PTR_M MAKEMASK(0x7FFF, 0)
#define IXGBE_ACI_NVM_LLDP_STATUS_M MAKEMASK(0xF, 0)
#define IXGBE_ACI_NODE_HANDLE MAKEMASK(0x3FF, 0)
#define IXGBE_ACI_DRIVING_CLK_NUM MAKEMASK(0x3F, IXGBE_ACI_DRIVING_CLK_NUM_SHIFT)
#define IXGBE_ACI_SET_CGU_OUT_CFG_DPLL_SRC_SEL MAKEMASK(0x1F, 0)
MAKEMASK(0x1F, IXGBE_ACI_GET_CGU_OUT_CFG_DPLL_SRC_SEL_SHIFT)
MAKEMASK(0x7, IXGBE_ACI_GET_CGU_OUT_CFG_DPLL_MODE_SHIFT)
MAKEMASK(0x1F, IXGBE_ACI_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT)
MAKEMASK(0x7, IXGBE_ACI_GET_CGU_DPLL_STATUS_STATE_MODE_SHIFT)
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_CLK_REF_SEL MAKEMASK(0x1F, 0)
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_MODE MAKEMASK(0x7, 5)
#define IXGBE_LINK_TOPO_NODE_COUNT_M MAKEMASK(0x3FF, 0)
MAKEMASK(0xFF, IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_S)
#define GL_FWSTS_FWS0B_M MAKEMASK(0xFF, 0)
#define GL_FWSTS_FWS1B_M MAKEMASK(0xFF, 16)
#define GL_MNG_FWSM_FW_MODES_M MAKEMASK(0x7, 0)
#define GL_MNG_FWSM_RSV0_M MAKEMASK(0xFF, 2)
#define GL_MNG_FWSM_RSV1_M MAKEMASK(0xF, 11)
#define GL_MNG_FWSM_EXT_ERR_IND_M MAKEMASK(0x3F, 19)
#define GL_MNG_FWSM_RESERVED_11_M MAKEMASK(0xF, 26)
#define GL_MNG_FWSM_RSV5_M MAKEMASK(0x3, 30)
#define GLNVM_GENS_SR_SIZE_M MAKEMASK(0x7, 5)
#define RDASB_RHDR0_RESPONSE_M MAKEMASK(0x7, 27)
#define GL_FWRESETCNT_FWRESETCNT_M MAKEMASK(0xFFFFFFFF, 0)
#define IXGBE_ACI_PHY_CAPS_MASK MAKEMASK(0xff, 0)
#define IXGBE_ACI_PHY_FEC_MASK MAKEMASK(0xdf, 0)
#define IXGBE_ACI_PHY_ENA_VALID_MASK MAKEMASK(0xef, 0)