LM_PAGE_BITS
val = (CCELL_CMD_TYPE_TYPE_L2 | ((LM_PAGE_BITS-8) << 4)) << 24;
val |= LM_PAGE_BITS-8;
val |= LM_PAGE_BITS-8;
switch((LM_PAGE_BITS - 8) << 4)
val |= (LM_PAGE_BITS - 8) << 24 | 0x40;
val = (LM_PAGE_BITS - 8) << 24;
val |= (LM_PAGE_BITS - 8) << 16;
val = (CCELL_CMD_TYPE_TYPE_L2 | ((LM_PAGE_BITS-8) << 4)) << 24;
#ifndef LM_PAGE_BITS
#define LM_PAGE_SIZE (1 << LM_PAGE_BITS)
#define LM_TPA_PAGE_BITS (LM_PAGE_BITS) /* 4K page. */
#ifndef LM_PAGE_BITS
#define LM_PAGE_SIZE (1 << LM_PAGE_BITS)
if (LM_PAGE_BITS - ISCSI_PAGE_BITS_SHIFT != page_size_bits)
LM_INTMEM_WRITE8 (pdev, TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), LM_PAGE_BITS, BAR_TSTRORM_INTMEM);
LM_INTMEM_WRITE8 (pdev, USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), LM_PAGE_BITS, BAR_USTRORM_INTMEM);
LM_INTMEM_WRITE8 (pdev, XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), LM_PAGE_BITS, BAR_XSTRORM_INTMEM);
LM_INTMEM_WRITE8 (pdev, CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), LM_PAGE_BITS, BAR_CSTRORM_INTMEM);