Symbol: DBG_REG_WRAP_ON_INT_BUFFER
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
4170
#define DBG_REG_WRAP_ON_INT_BUFFER 0xc128UL //ACCESS:R DataWidth:0x1 Description: debug only: This bit indicates wheter the internal buffer was wrapped (oldest data was thrown) Relevant only when ~dbg_registers_debug_target=0 (internal buffer)
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34414
#define DBG_REG_WRAP_ON_INT_BUFFER 0x010418UL //Access:R DataWidth:0x1 // Debug only: This bit indicates wheter the internal buffer was wrapped (oldest data was thrown) Relevant only when DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
30910
#define DBG_REG_WRAP_ON_INT_BUFFER 0x010418UL //Access:R DataWidth:0x1 Debug only: This bit indicates wheter the internal buffer was wrapped (oldest data was thrown) Relevant only when DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer). Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34382
#define DBG_REG_WRAP_ON_INT_BUFFER 0x010418UL //Access:R DataWidth:0x1 // Debug only: This bit indicates wheter the internal buffer was wrapped (oldest data was thrown) Relevant only when DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34382
#define DBG_REG_WRAP_ON_INT_BUFFER 0x010418UL //Access:R DataWidth:0x1 // Debug only: This bit indicates wheter the internal buffer was wrapped (oldest data was thrown) Relevant only when DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34382
#define DBG_REG_WRAP_ON_INT_BUFFER 0x010418UL //Access:R DataWidth:0x1 // Debug only: This bit indicates wheter the internal buffer was wrapped (oldest data was thrown) Relevant only when DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer).