DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0
#define DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0 0xd0ccUL //ACCESS:RW DataWidth:0x1 Description: The frame that need to be compared. The 1 bit vector is determined as follows: (a) frame[0] - if trigger_state_set_cnstr_offseti[0] = 0 OR (b) frame[3] - if trigger_state_set_cnstr_offseti[0] = 1
#define DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0 0x0105fcUL //Access:RW DataWidth:0x1 // The frame that need to be compared. The 1 bit vector is determined as follows: frame[trigger_state_set_cnstr_offseti[2:0]].
#define DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0 0x0105fcUL //Access:RW DataWidth:0x1 The frame that need to be compared. The 1 bit vector is determined as follows: (a) frame[0] - if trigger_state_set_cnstr_offseti[1:0] = 0 OR (b) frame[1] - if trigger_state_set_cnstr_offseti[1:0] = 1 OR (c) frame[2] - if trigger_state_set_cnstr_offseti[1:0] = 2 OR (d) frame[3] - if trigger_state_set_cnstr_offseti[1:0] = 3. Chips: BB_A0 BB_B0 K2
#define DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0 0x0105fcUL //Access:RW DataWidth:0x1 // The frame that need to be compared. The 1 bit vector is determined as follows: (a) frame[0] - if trigger_state_set_cnstr_offseti[1:0] = 0 OR (b) frame[1] - if trigger_state_set_cnstr_offseti[1:0] = 1 OR (c) frame[2] - if trigger_state_set_cnstr_offseti[1:0] = 2 OR (d) frame[3] - if trigger_state_set_cnstr_offseti[1:0] = 3.
#define DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0 0x0105fcUL //Access:RW DataWidth:0x1 // The frame that need to be compared. The 1 bit vector is determined as follows: frame[trigger_state_set_cnstr_offseti[2:0]].
#define DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0 0x0105fcUL //Access:RW DataWidth:0x1 // The frame that need to be compared. The 1 bit vector is determined as follows: (a) frame[0] - if trigger_state_set_cnstr_offseti[1:0] = 0 OR (b) frame[1] - if trigger_state_set_cnstr_offseti[1:0] = 1 OR (c) frame[2] - if trigger_state_set_cnstr_offseti[1:0] = 2 OR (d) frame[3] - if trigger_state_set_cnstr_offseti[1:0] = 3.