Symbol: DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
4027
#define DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0 0xd42cUL //ACCESS:RW DataWidth:0x1 Description: (a) 1: use trigger_state_msg_lengthi to determine message boundary. (b) 0: use trigger_state_valid_seli to determine which frame (frame[0]/frame[3]) signals message boundary (end of message)
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34799
#define DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0 0x01095cUL //Access:RW DataWidth:0x1 // (a) 1: use trigger_state_msg_lengthi to determine message boundary. (b) 0: use masking according to trigger_state_id only.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
31295
#define DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0 0x01095cUL //Access:RW DataWidth:0x1 (a) 1: use trigger_state_msg_lengthi to determine message boundary. (b) 0: use masking according to trigger_state_id only. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34767
#define DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0 0x01095cUL //Access:RW DataWidth:0x1 // (a) 1: use trigger_state_msg_lengthi to determine message boundary. (b) 0: use masking according to trigger_state_id only.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34767
#define DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0 0x01095cUL //Access:RW DataWidth:0x1 // (a) 1: use trigger_state_msg_lengthi to determine message boundary. (b) 0: use masking according to trigger_state_id only.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34767
#define DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0 0x01095cUL //Access:RW DataWidth:0x1 // (a) 1: use trigger_state_msg_lengthi to determine message boundary. (b) 0: use masking according to trigger_state_id only.