Symbol: DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
4115
#define DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE 0xd54cUL //ACCESS:RW DataWidth:0x1 Description: Recording mode upon trigger event: (a) 0- enable recording data upon triggering event; in that case record for rcrd_on_window_post_num_cycles valid cycles upon the event; (b) 1 - disable recording data upon triggering event. NOTE: applicable only if trigger_enable=1
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34891
#define DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE 0x010a8cUL //Access:RW DataWidth:0x1 // Recording mode upon trigger event: (a) 0- enable recording data upon triggering event; in that case record for rcrd_on_window_post_num_cycles valid cycles upon the event; (b) 1 - disable recording data upon triggering event. NOTE: applicable only if trigger_enable=1.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
31387
#define DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE 0x010a8cUL //Access:RW DataWidth:0x1 Recording mode upon trigger event: (a) 0- enable recording data upon triggering event; in that case record for rcrd_on_window_post_num_cycles valid cycles upon the event; (b) 1 - disable recording data upon triggering event. NOTE: applicable only if trigger_enable=1. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34859
#define DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE 0x010a8cUL //Access:RW DataWidth:0x1 // Recording mode upon trigger event: (a) 0- enable recording data upon triggering event; in that case record for rcrd_on_window_post_num_cycles valid cycles upon the event; (b) 1 - disable recording data upon triggering event. NOTE: applicable only if trigger_enable=1.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34859
#define DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE 0x010a8cUL //Access:RW DataWidth:0x1 // Recording mode upon trigger event: (a) 0- enable recording data upon triggering event; in that case record for rcrd_on_window_post_num_cycles valid cycles upon the event; (b) 1 - disable recording data upon triggering event. NOTE: applicable only if trigger_enable=1.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34859
#define DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE 0x010a8cUL //Access:RW DataWidth:0x1 // Recording mode upon trigger event: (a) 0- enable recording data upon triggering event; in that case record for rcrd_on_window_post_num_cycles valid cycles upon the event; (b) 1 - disable recording data upon triggering event. NOTE: applicable only if trigger_enable=1.