Symbol: DBG_REG_PCI_LOGIC_ADDR
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
3632
#define DBG_REG_PCI_LOGIC_ADDR 0xc07cUL //ACCESS:RW DataWidth:0x1 Description: debug only: This bit indicates logical/physical address in PCI request as follows: (a) 1 - logical address; (b) 0 - physical address;
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34432
#define DBG_REG_PCI_LOGIC_ADDR 0x010460UL //Access:RW DataWidth:0x1 // Debug only: This bit indicates logical/physical address in PCI request as follows: (a) 1 - logical address; (b) 0 - physical address;.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
30928
#define DBG_REG_PCI_LOGIC_ADDR 0x010460UL //Access:RW DataWidth:0x1 Debug only: This bit indicates logical/physical address in PCI request as follows: (a) 1 - logical address; (b) 0 - physical address;. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34400
#define DBG_REG_PCI_LOGIC_ADDR 0x010460UL //Access:RW DataWidth:0x1 // Debug only: This bit indicates logical/physical address in PCI request as follows: (a) 1 - logical address; (b) 0 - physical address;.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34400
#define DBG_REG_PCI_LOGIC_ADDR 0x010460UL //Access:RW DataWidth:0x1 // Debug only: This bit indicates logical/physical address in PCI request as follows: (a) 1 - logical address; (b) 0 - physical address;.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34400
#define DBG_REG_PCI_LOGIC_ADDR 0x010460UL //Access:RW DataWidth:0x1 // Debug only: This bit indicates logical/physical address in PCI request as follows: (a) 1 - logical address; (b) 0 - physical address;.