Symbol: DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
3619
#define DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB 0xc048UL //ACCESS:RW DataWidth:0x20 Description: debug only: LSB of external PCI buffer start address; MUST be configured BEFORE pci_req_credit is configured
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34420
#define DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB 0x010430UL //Access:RW DataWidth:0x20 // Debug only: LSB of external PCI buffer start address; MUST be configured BEFORE pci_req_credit is configured.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
30916
#define DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB 0x010430UL //Access:RW DataWidth:0x20 Debug only: LSB of external PCI buffer start address; MUST be configured BEFORE pci_req_credit is configured. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34388
#define DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB 0x010430UL //Access:RW DataWidth:0x20 // Debug only: LSB of external PCI buffer start address; MUST be configured BEFORE pci_req_credit is configured.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34388
#define DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB 0x010430UL //Access:RW DataWidth:0x20 // Debug only: LSB of external PCI buffer start address; MUST be configured BEFORE pci_req_credit is configured.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34388
#define DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB 0x010430UL //Access:RW DataWidth:0x20 // Debug only: LSB of external PCI buffer start address; MUST be configured BEFORE pci_req_credit is configured.