Symbol: DBG_REG_PCI_EXT_BUFFER_SIZE
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
3621
#define DBG_REG_PCI_EXT_BUFFER_SIZE 0xc050UL //ACCESS:RW DataWidth:0x18 Description: debug only: These bits indicate the value of the external PCI buffer size in 256 Byte chunks (The reset value is for 128 Mbyte buffer)
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34422
#define DBG_REG_PCI_EXT_BUFFER_SIZE 0x010438UL //Access:RW DataWidth:0x18 // Debug only: These bits indicate the value of the external PCI buffer size in target_packet_size chunks (The reset value is for 128 Mbyte buffer).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
30918
#define DBG_REG_PCI_EXT_BUFFER_SIZE 0x010438UL //Access:RW DataWidth:0x18 Debug only: These bits indicate the value of the external PCI buffer size in target_packet_size chunks (The reset value is for 128 Mbyte buffer). Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34390
#define DBG_REG_PCI_EXT_BUFFER_SIZE 0x010438UL //Access:RW DataWidth:0x18 // Debug only: These bits indicate the value of the external PCI buffer size in target_packet_size chunks (The reset value is for 128 Mbyte buffer).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34390
#define DBG_REG_PCI_EXT_BUFFER_SIZE 0x010438UL //Access:RW DataWidth:0x18 // Debug only: These bits indicate the value of the external PCI buffer size in target_packet_size chunks (The reset value is for 128 Mbyte buffer).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34390
#define DBG_REG_PCI_EXT_BUFFER_SIZE 0x010438UL //Access:RW DataWidth:0x18 // Debug only: These bits indicate the value of the external PCI buffer size in target_packet_size chunks (The reset value is for 128 Mbyte buffer).