Symbol: DBG_REG_FULL_MODE
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
3614
#define DBG_REG_FULL_MODE 0xc034UL //ACCESS:RW DataWidth:0x1 Description: debug only: This bit indicates whether data will be wrapped (oldest data is thrown) or overflowed-one shot (newest data is thrown) as follows: (a) When ~dbg_registers_debug_target=2/0 (PCI/internal buffer): 1 - wrap; 0 - One Shot; (b) When ~dbg_registers_debug_target=1 (NIG): 1 - constant send; 0 - One Shot;
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34391
#define DBG_REG_FULL_MODE 0x010060UL //Access:RW DataWidth:0x1 // Debug only: This bit indicates whether data will be wrapped (oldest data is thrown) or overflowed-one shot (newest data is thrown) as follows: (a) When DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer): 1- wrap internal buffer; 0 - One Shot; b) When DBG_REGISTERS_DEBUG_TARGET =1 (NIG): 1 - constant send; 0 - One Shot; c) When DBG_REGISTERS_DEBUG_TARGET =2 (PXP): 1 - wrap host memory in PXP; 0 - One Shot;.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
30886
#define DBG_REG_FULL_MODE 0x010060UL //Access:RW DataWidth:0x1 Debug only: This bit indicates whether data will be wrapped (oldest data is thrown) or overflowed-one shot (newest data is thrown) as follows: (a) When DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer): 1- wrap internal buffer; 0 - One Shot; b) When DBG_REGISTERS_DEBUG_TARGET =1 (NIG): 1 - constant send; 0 - One Shot; c) When DBG_REGISTERS_DEBUG_TARGET =2 (PXP): 1 - wrap host memory in PXP; 0 - One Shot;. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34359
#define DBG_REG_FULL_MODE 0x010060UL //Access:RW DataWidth:0x1 // Debug only: This bit indicates whether data will be wrapped (oldest data is thrown) or overflowed-one shot (newest data is thrown) as follows: (a) When DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer): 1- wrap internal buffer; 0 - One Shot; b) When DBG_REGISTERS_DEBUG_TARGET =1 (NIG): 1 - constant send; 0 - One Shot; c) When DBG_REGISTERS_DEBUG_TARGET =2 (PXP): 1 - wrap host memory in PXP; 0 - One Shot;.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34359
#define DBG_REG_FULL_MODE 0x010060UL //Access:RW DataWidth:0x1 // Debug only: This bit indicates whether data will be wrapped (oldest data is thrown) or overflowed-one shot (newest data is thrown) as follows: (a) When DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer): 1- wrap internal buffer; 0 - One Shot; b) When DBG_REGISTERS_DEBUG_TARGET =1 (NIG): 1 - constant send; 0 - One Shot; c) When DBG_REGISTERS_DEBUG_TARGET =2 (PXP): 1 - wrap host memory in PXP; 0 - One Shot;.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34359
#define DBG_REG_FULL_MODE 0x010060UL //Access:RW DataWidth:0x1 // Debug only: This bit indicates whether data will be wrapped (oldest data is thrown) or overflowed-one shot (newest data is thrown) as follows: (a) When DBG_REGISTERS_DEBUG_TARGET =0 (internal buffer): 1- wrap internal buffer; 0 - One Shot; b) When DBG_REGISTERS_DEBUG_TARGET =1 (NIG): 1 - constant send; 0 - One Shot; c) When DBG_REGISTERS_DEBUG_TARGET =2 (PXP): 1 - wrap host memory in PXP; 0 - One Shot;.