DBG_REG_FRAMING_MODE
#define DBG_REG_FRAMING_MODE 0xc02cUL //ACCESS:RW DataWidth:0x2 Description: debug only: These bits indicate the framing mode: 0 - tdm (32/64) mode; 1 - 64 bits mode; 2 - 24 bits mode;
#define DBG_REG_FRAMING_MODE 0x010058UL //Access:RW DataWidth:0x2 // Framing modes: 0 - 128b STORM (A and B) data is logged 1 - 64b STORM (A and B) data + 4 different (in general case) HW blocks are logged 2 - 32b STORM (A and B) data + 6 different (in general case) HW blocks are logged 3 - 8 different (in general case) HW blocks are logged
#define DBG_REG_FRAMING_MODE 0x010058UL //Access:RW DataWidth:0x3 Framing mode 0 is 128b from one STORM; Framing mode 1 is 2 HW blocks of 32b + 64b STORM; Framing mode 2 is 3 HW blocks of 32b + 32b STORM; Framing mode 3 is 4 HW blocks of 32b; Framing mode 4 is 4 HW blocks of 64b Chips: BB_A0 BB_B0 K2
#define DBG_REG_FRAMING_MODE 0x010058UL //Access:RW DataWidth:0x3 // Framing mode 0 is 128b from one STORM; Framing mode 1 is 2 HW blocks of 32b + 64b STORM; Framing mode 2 is 3 HW blocks of 32b + 32b STORM; Framing mode 3 is 4 HW blocks of 32b; Framing mode 4 is 4 HW blocks of 64b
#define DBG_REG_FRAMING_MODE 0x010058UL //Access:RW DataWidth:0x2 // Framing modes: 0 - 128b STORM (A and B) data is logged 1 - 64b STORM (A and B) data + 4 different (in general case) HW blocks are logged 2 - 32b STORM (A and B) data + 6 different (in general case) HW blocks are logged 3 - 8 different (in general case) HW blocks are logged
#define DBG_REG_FRAMING_MODE 0x010058UL //Access:RW DataWidth:0x3 // Framing mode 0 is 128b from one STORM; Framing mode 1 is 2 HW blocks of 32b + 64b STORM; Framing mode 2 is 3 HW blocks of 32b + 32b STORM; Framing mode 3 is 4 HW blocks of 32b; Framing mode 4 is 4 HW blocks of 64b