Symbol: DBG_REG_FILTER_MSG_LENGTH_ENABLE
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
4112
#define DBG_REG_FILTER_MSG_LENGTH_ENABLE 0xd540UL //ACCESS:RW DataWidth:0x1 Description: (a) 1: use filter_msg_length to determine message boundary. (b) 0: use filter_valid_sel to determine which frame (frame[0]/frame[3]) signals message boundary (end of message)
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34886
#define DBG_REG_FILTER_MSG_LENGTH_ENABLE 0x010a78UL //Access:RW DataWidth:0x1 // (a) 1: use filter_msg_length to determine message boundary. (b) 0: use the frame bit to determine message boundary.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
31382
#define DBG_REG_FILTER_MSG_LENGTH_ENABLE 0x010a78UL //Access:RW DataWidth:0x1 (a) 1: use filter_msg_length to determine message boundary. (b) 0: use the frame bit to determine message boundary. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34854
#define DBG_REG_FILTER_MSG_LENGTH_ENABLE 0x010a78UL //Access:RW DataWidth:0x1 // (a) 1: use filter_msg_length to determine message boundary. (b) 0: use the frame bit to determine message boundary.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34854
#define DBG_REG_FILTER_MSG_LENGTH_ENABLE 0x010a78UL //Access:RW DataWidth:0x1 // (a) 1: use filter_msg_length to determine message boundary. (b) 0: use the frame bit to determine message boundary.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34854
#define DBG_REG_FILTER_MSG_LENGTH_ENABLE 0x010a78UL //Access:RW DataWidth:0x1 // (a) 1: use filter_msg_length to determine message boundary. (b) 0: use the frame bit to determine message boundary.