DBG_REG_FILTER_ID_NUM
#define DBG_REG_FILTER_ID_NUM 0x0109d4UL //Access:RW DataWidth:0x4 // Number of ID that should be filtered.Number of ID that should be filtered. For HW block only bits[2:0] are used. Bit[3] should be set to 0. For STORM bit[3] designates what STORM should be triggered (0 - STORM A; 1 - STORM B). Bits[2:0] designate STORM ID.
#define DBG_REG_FILTER_ID_NUM 0x0109d4UL //Access:RW DataWidth:0x3 Number of ID that should be filtered. Chips: BB_A0 BB_B0 K2
#define DBG_REG_FILTER_ID_NUM 0x0109d4UL //Access:RW DataWidth:0x3 // Number of ID that should be filtered.
#define DBG_REG_FILTER_ID_NUM 0x0109d4UL //Access:RW DataWidth:0x4 // Number of ID that should be filtered.Number of ID that should be filtered. For HW block only bits[2:0] are used. Bit[3] should be set to 0. For STORM bit[3] designates what STORM should be triggered (0 - STORM A; 1 - STORM B). Bits[2:0] designate STORM ID.
#define DBG_REG_FILTER_ID_NUM 0x0109d4UL //Access:RW DataWidth:0x3 // Number of ID that should be filtered.