Symbol: DBG_REG_FILTER_ENABLE
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
4053
#define DBG_REG_FILTER_ENABLE 0xd494UL //ACCESS:RW DataWidth:0x2 Description: (a) 00 - Filter off; in that case all data should be transmitted to the internal buffer without any filtering implemented (data should bypass filtering machine). (b) 01 - Filter on prior (in time domain) to trigger_event (asserted by the triggering machine block) only; When off (after trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (c) 10 - Filter on upon trigger_event (asserted by the triggering machine) only. When off (before trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (d) 11 - Filter on - constant filterin
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
34828
#define DBG_REG_FILTER_ENABLE 0x0109d0UL //Access:RW DataWidth:0x2 // (a) 00 - Filter off; in that case all data should be transmitted to the internal buffer without any filtering implemented (data should bypass filtering machine). (b) 01 - Filter on prior (in time domain) to trigger_event (asserted by the triggering machine block) only; When off (after trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (c) 10 - Filter on upon trigger_event (asserted by the triggering machine) only. When off (before trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (d) 11 - Filter on - constant filtering; in this case the triggering event (asserted by the triggering machine) is irrelevant.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
31324
#define DBG_REG_FILTER_ENABLE 0x0109d0UL //Access:RW DataWidth:0x2 (a) 00 - Filter off; in that case all data should be transmitted to the internal buffer without any filtering implemented (data should bypass filtering machine). (b) 01 - Filter on prior (in time domain) to trigger_event (asserted by the triggering machine block) only; When off (after trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (c) 10 - Filter on upon trigger_event (asserted by the triggering machine) only. When off (before trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (d) 11 - Filter on - constant filtering; in this case the triggering event (asserted by the triggering machine) is irrelevant. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
34796
#define DBG_REG_FILTER_ENABLE 0x0109d0UL //Access:RW DataWidth:0x2 // (a) 00 - Filter off; in that case all data should be transmitted to the internal buffer without any filtering implemented (data should bypass filtering machine). (b) 01 - Filter on prior (in time domain) to trigger_event (asserted by the triggering machine block) only; When off (after trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (c) 10 - Filter on upon trigger_event (asserted by the triggering machine) only. When off (before trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (d) 11 - Filter on - constant filtering; in this case the triggering event (asserted by the triggering machine) is irrelevant.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
34796
#define DBG_REG_FILTER_ENABLE 0x0109d0UL //Access:RW DataWidth:0x2 // (a) 00 - Filter off; in that case all data should be transmitted to the internal buffer without any filtering implemented (data should bypass filtering machine). (b) 01 - Filter on prior (in time domain) to trigger_event (asserted by the triggering machine block) only; When off (after trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (c) 10 - Filter on upon trigger_event (asserted by the triggering machine) only. When off (before trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (d) 11 - Filter on - constant filtering; in this case the triggering event (asserted by the triggering machine) is irrelevant.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
34796
#define DBG_REG_FILTER_ENABLE 0x0109d0UL //Access:RW DataWidth:0x2 // (a) 00 - Filter off; in that case all data should be transmitted to the internal buffer without any filtering implemented (data should bypass filtering machine). (b) 01 - Filter on prior (in time domain) to trigger_event (asserted by the triggering machine block) only; When off (after trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (c) 10 - Filter on upon trigger_event (asserted by the triggering machine) only. When off (before trigger event) - data should be transmitted to the internal buffer without any filtering. in this mode trigger_enable must be set. (d) 11 - Filter on - constant filtering; in this case the triggering event (asserted by the triggering machine) is irrelevant.