DBG_REG_EXT_BUFFER_WR_PTR
#define DBG_REG_EXT_BUFFER_WR_PTR 0xc140UL //ACCESS:WB_R DataWidth:0x40 Description: debug only: These bits indicate the value of the write pointer for the external pci buffer when ~dbg_registers_debug_target=2 (PCI). It describes the next address to write to the external buffer; 1024 Byte Chunks counter when ~dbg_registers_debug_target=1 (NIG) and ~dbg_registers_full_mode=0 (one-shot); WB Read Only (write request will not be acknowledged);
#define DBG_REG_EXT_BUFFER_WR_PTR 0x010410UL //Access:WB_R DataWidth:0x40 // Debug only: These bits indicate the value of the write pointer for the external pci buffer when DBG_REGISTERS_DEBUG_TARGET =2 (PCI). It describes the next address to write to the external buffer; TARGET_PACKET_SIZE chunks counter when DBG_REGISTERS_DEBUG_TARGET =1 (NIG) and DBG_REGISTERS_FULL_MODE =0 (one-shot); WB Read Only (write request will not be acknowledged);.
#define DBG_REG_EXT_BUFFER_WR_PTR 0x010410UL //Access:WB_R DataWidth:0x40 Debug only: These bits indicate the value of the write pointer for the external pci buffer when DBG_REGISTERS_DEBUG_TARGET =2 (PCI). It describes the next address to write to the external buffer; TARGET_PACKET_SIZE chunks counter when DBG_REGISTERS_DEBUG_TARGET =1 (NIG) and DBG_REGISTERS_FULL_MODE =0 (one-shot); WB Read Only (write request will not be acknowledged);. Chips: BB_A0 BB_B0 K2
#define DBG_REG_EXT_BUFFER_WR_PTR 0x010410UL //Access:WB_R DataWidth:0x40 // Debug only: These bits indicate the value of the write pointer for the external pci buffer when DBG_REGISTERS_DEBUG_TARGET =2 (PCI). It describes the next address to write to the external buffer; TARGET_PACKET_SIZE chunks counter when DBG_REGISTERS_DEBUG_TARGET =1 (NIG) and DBG_REGISTERS_FULL_MODE =0 (one-shot); WB Read Only (write request will not be acknowledged);.
#define DBG_REG_EXT_BUFFER_WR_PTR 0x010410UL //Access:WB_R DataWidth:0x40 // Debug only: These bits indicate the value of the write pointer for the external pci buffer when DBG_REGISTERS_DEBUG_TARGET =2 (PCI). It describes the next address to write to the external buffer; TARGET_PACKET_SIZE chunks counter when DBG_REGISTERS_DEBUG_TARGET =1 (NIG) and DBG_REGISTERS_FULL_MODE =0 (one-shot); WB Read Only (write request will not be acknowledged);.
#define DBG_REG_EXT_BUFFER_WR_PTR 0x010410UL //Access:WB_R DataWidth:0x40 // Debug only: These bits indicate the value of the write pointer for the external pci buffer when DBG_REGISTERS_DEBUG_TARGET =2 (PCI). It describes the next address to write to the external buffer; TARGET_PACKET_SIZE chunks counter when DBG_REGISTERS_DEBUG_TARGET =1 (NIG) and DBG_REGISTERS_FULL_MODE =0 (one-shot); WB Read Only (write request will not be acknowledged);.