DBG_REG_CLIENT_ENABLE
#define DBG_REG_CLIENT_ENABLE 0xc000UL //ACCESS:RW DataWidth:0x9 Description: debug only: These bits are enables to client interfaces as follows: 0b000000001 - rx; 0b000000010 - nm; 0b000000100 - ulp; 0b000001000 - tx; 0b000010000 - cpt; 0b000100000 - usem; 0b001000000 - xsem; 0b010000000 - tsem; 0b100000000 - csem;
#define DBG_REG_CLIENT_ENABLE 0x010004UL //Access:RW DataWidth:0x13 // Enable to client interfaces: Bits 0- RBCN; 1- RBCP; 2-RBCR; 3- RBCT; 4- RBCU; 5- RBCF; 6- RBCX; 7- RBCS; 8-RBCH; 9-RBCZ; 10 - other engine input (obsolete); 11-Timestamp client; 12-CPU client; 13-RBCY; 14-RBCQ; 15-RBCM; 16-RBCB; 17-RBCW; 18-RBCV;
#define DBG_REG_CLIENT_ENABLE 0x010004UL //Access:RW DataWidth:0x13 Enable to client interfaces: Bits 0- RBCN; 1- RBCP; 2-RBCR; 3- RBCT; 4- RBCU; 5- RBCF; 6- RBCX; 7- RBCS; 8-RBCH; 9-RBCZ; 10 - other engine input; 11-Timestamp client; 12-CPU client; 13-RBCY; 14-RBCQ; 15-RBCM; 16-RBCB; 17-RBCW; 18-RBCV; Chips: BB_A0 BB_B0 K2
#define DBG_REG_CLIENT_ENABLE 0x010004UL //Access:RW DataWidth:0xd // Enable to client interfaces: Bits 0- RBCN; 1- RBCP; 2- RBCR; 3- RBCT; 4- RBCU; 5- RBCF; 6- RBCX; 7- RBCS; 8-RBCH; 9-RBCZ; 10 - other engine input; 11-Timestamp client; 12-CPU client,
#define DBG_REG_CLIENT_ENABLE 0x010004UL //Access:RW DataWidth:0x13 // Enable to client interfaces: Bits 0- RBCN; 1- RBCP; 2-RBCR; 3- RBCT; 4- RBCU; 5- RBCF; 6- RBCX; 7- RBCS; 8-RBCH; 9-RBCZ; 10 - other engine input (obsolete); 11-Timestamp client; 12-CPU client; 13-RBCY; 14-RBCQ; 15-RBCM; 16-RBCB; 17-RBCW; 18-RBCV;
#define DBG_REG_CLIENT_ENABLE 0x010004UL //Access:RW DataWidth:0x13 // Enable to client interfaces: Bits 0- RBCN; 1- RBCP; 2-RBCR; 3- RBCT; 4- RBCU; 5- RBCF; 6- RBCX; 7- RBCS; 8-RBCH; 9-RBCZ; 10 - other engine input; 11-Timestamp client; 12-CPU client; 13-RBCY; 14-RBCQ; 15-RBCM; 16-RBCB; 17-RBCW; 18-RBCV;