XMAC_REG_CTRL_SA_LO
#define XMAC_REG_CTRL_SA_LO 0x28UL //ACCESS:RW DataWidth:0x20 Description: Lower 48 bits of ctrl_sa register. Used as the SA in PAUSE/PFC packets transmitted by the MAC
#define XMAC_REG_CTRL_SA_LO 0x210028UL //Access:RW DataWidth:0x20 Lower 48 bits of ctrl_sa register. Used as the SA in PAUSE/PFC packets transmitted by the MAC. Chips: BB_A0 BB_B0 K2