Symbol: XCM_REG_CTX_RBC_ACCS
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
69971
#define XCM_REG_CTX_RBC_ACCS 0x1001800UL //Access:RW DataWidth:0x10 // Context RBC access.[8:0] - base address (LCID/LTID); [15:9] - offset (in REGs (32b)) within LCID/LTID. The procedure to read context is: first define base address and offset; then read context with one of the following registers: CM_REGISTERS_AGG_CON_CTX.AGG_CON_CTX CM_REGISTERS_SM_CON_CTX.SM_CON_CTX CM_REGISTERS_AGG_TASK_CTX.AGG_TASK_CTX CM_REGISTERS_SM_TASK_CTX.SM_TASK_CTX
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
64374
#define XCM_REG_CTX_RBC_ACCS 0x1001800UL //Access:RW DataWidth:0x10 Context RBC access.[8:0] - base address (LCID/LTID); [15:9] - offset (in REGs (32b)) within LCID/LTID. The procedure to read context is: first define base address and offset; then read context with one of the following registers: CM_REGISTERS_AGG_CON_CTX.AGG_CON_CTX CM_REGISTERS_SM_CON_CTX.SM_CON_CTX CM_REGISTERS_AGG_TASK_CTX.AGG_TASK_CTX CM_REGISTERS_SM_TASK_CTX.SM_TASK_CTX Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
67638
#define XCM_REG_CTX_RBC_ACCS 0x1001800UL //Access:RW DataWidth:0x10 // Context RBC access.[8:0] - base address (LCID/LTID); [15:9] - offset (in REGs (32b)) within LCID/LTID. The procedure to read context is: first define base address and offset; then read context with one of the following registers: CM_REGISTERS_AGG_CON_CTX.AGG_CON_CTX CM_REGISTERS_SM_CON_CTX.SM_CON_CTX CM_REGISTERS_AGG_TASK_CTX.AGG_TASK_CTX CM_REGISTERS_SM_TASK_CTX.SM_TASK_CTX
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
67638
#define XCM_REG_CTX_RBC_ACCS 0x1001800UL //Access:RW DataWidth:0x10 // Context RBC access.[8:0] - base address (LCID/LTID); [15:9] - offset (in REGs (32b)) within LCID/LTID. The procedure to read context is: first define base address and offset; then read context with one of the following registers: CM_REGISTERS_AGG_CON_CTX.AGG_CON_CTX CM_REGISTERS_SM_CON_CTX.SM_CON_CTX CM_REGISTERS_AGG_TASK_CTX.AGG_TASK_CTX CM_REGISTERS_SM_TASK_CTX.SM_TASK_CTX
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
67638
#define XCM_REG_CTX_RBC_ACCS 0x1001800UL //Access:RW DataWidth:0x10 // Context RBC access.[8:0] - base address (LCID/LTID); [15:9] - offset (in REGs (32b)) within LCID/LTID. The procedure to read context is: first define base address and offset; then read context with one of the following registers: CM_REGISTERS_AGG_CON_CTX.AGG_CON_CTX CM_REGISTERS_SM_CON_CTX.SM_CON_CTX CM_REGISTERS_AGG_TASK_CTX.AGG_TASK_CTX CM_REGISTERS_SM_TASK_CTX.SM_TASK_CTX