Symbol: USDM_REG_DBG_FORCE_FRAME
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
68922
#define USDM_REG_DBG_FORCE_FRAME 0xfd0e38UL //Access:RW DataWidth:0x4 // DBMUX register. bit mask for forcing the frame signal per dword (128bit line) / qword (256bit line) (before shift).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
63359
#define USDM_REG_DBG_FORCE_FRAME 0xfd0e38UL //Access:RW DataWidth:0x4 DBMUX register. bit mask for forcing the frame signal per dword (128bit line) / qword (256bit line) (before shift). Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
66700
#define USDM_REG_DBG_FORCE_FRAME 0xfd0e38UL //Access:RW DataWidth:0x4 // DBMUX register. bit mask for forcing the frame signal per dword (128bit line) / qword (256bit line) (before shift).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
66700
#define USDM_REG_DBG_FORCE_FRAME 0xfd0e38UL //Access:RW DataWidth:0x4 // DBMUX register. bit mask for forcing the frame signal per dword (128bit line) / qword (256bit line) (before shift).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
66700
#define USDM_REG_DBG_FORCE_FRAME 0xfd0e38UL //Access:RW DataWidth:0x4 // DBMUX register. bit mask for forcing the frame signal per dword (128bit line) / qword (256bit line) (before shift).