Symbol: TM_REG_PF_ENABLE_TASK
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
45516
#define TM_REG_PF_ENABLE_TASK 0x2c0444UL //Access:RW DataWidth:0x4 // Enable the PF functions for the tasks. This configuration is applicable only to scan opeartion. Bit 0: segment 0, bit 1: segment 1, bit 2: segment 2, bit 3: segment 3. Was: en_linear1_timer.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
41403
#define TM_REG_PF_ENABLE_TASK 0x2c0444UL //Access:RW DataWidth:0x4 Enable the PF functions for the tasks. This configuration is applicable only to scan opeartion. Bit 0: segment 0, bit 1: segment 1, bit 2: segment 2, bit 3: segment 3. Was: en_linear1_timer. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
44511
#define TM_REG_PF_ENABLE_TASK 0x2c0444UL //Access:RW DataWidth:0x4 // Enable the PF functions for the tasks. This configuration is applicable only to scan opeartion. Bit 0: segment 0, bit 1: segment 1, bit 2: segment 2, bit 3: segment 3. Was: en_linear1_timer.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
44511
#define TM_REG_PF_ENABLE_TASK 0x2c0444UL //Access:RW DataWidth:0x4 // Enable the PF functions for the tasks. This configuration is applicable only to scan opeartion. Bit 0: segment 0, bit 1: segment 1, bit 2: segment 2, bit 3: segment 3. Was: en_linear1_timer.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
44511
#define TM_REG_PF_ENABLE_TASK 0x2c0444UL //Access:RW DataWidth:0x4 // Enable the PF functions for the tasks. This configuration is applicable only to scan opeartion. Bit 0: segment 0, bit 1: segment 1, bit 2: segment 2, bit 3: segment 3. Was: en_linear1_timer.