TM_REG_INT_MASK_1
#define TM_REG_INT_MASK_1 0x2c0194UL //Access:RW DataWidth:0xb // Multi Field Register.
#define TM_REG_INT_MASK_1 0x2c0194UL //Access:RW DataWidth:0xb Multi Field Register. Chips: BB_A0 BB_B0 K2
#define TM_REG_INT_MASK_1 0x2c0194UL //Access:RW DataWidth:0xb // Multi Field Register.
#define TM_REG_INT_MASK_1 0x2c0194UL //Access:RW DataWidth:0xb // Multi Field Register.
#define TM_REG_INT_MASK_1 0x2c0194UL //Access:RW DataWidth:0xb // Multi Field Register.