SEM_FAST_REG_EVENT_ID_MASK
#define SEM_FAST_REG_EVENT_ID_MASK 0x18fc0UL //ACCESS:RW DataWidth:0x8 Description: mask for event id. 1- specified bit is ignored; 0 - specified bit is checked
#define SEM_FAST_REG_EVENT_ID_MASK 0x00075cUL //Access:RW DataWidth:0x8 // Mask for event id. 1- specified bit is ignored; 0 - specified bit is checked.
#define SEM_FAST_REG_EVENT_ID_MASK 0x00075cUL //Access:RW DataWidth:0x8 Mask for event id. 1- specified bit is ignored; 0 - specified bit is checked. Chips: BB_A0 BB_B0 K2
#define SEM_FAST_REG_EVENT_ID_MASK 0x00075cUL //Access:RW DataWidth:0x8 // Mask for event id. 1- specified bit is ignored; 0 - specified bit is checked.
#define SEM_FAST_REG_EVENT_ID_MASK 0x00075cUL //Access:RW DataWidth:0x8 // Mask for event id. 1- specified bit is ignored; 0 - specified bit is checked.
#define SEM_FAST_REG_EVENT_ID_MASK 0x00075cUL //Access:RW DataWidth:0x8 // Mask for event id. 1- specified bit is ignored; 0 - specified bit is checked.