Symbol: REG_PLL_CLK_SPEED
usr/src/uts/common/io/chxge/com/vsc7321_reg.h
47
#define REG_PLL_CLK_SPEED CRA(0x7,0xf,0x19) /* Clock Speed Selection */
usr/src/uts/common/io/chxge/com/vsc7326_reg.h
49
#define REG_PLL_CLK_SPEED CRA(0x7,0xf,0x19) /* Clock Speed Selection */