QM_REG_SDMCMDREADY
#define QM_REG_SDMCMDREADY 0x2f1e10UL //Access:R DataWidth:0x1 // SDM command Ready. This reg is used for sending SDM command through the RBC. See command description in the QM EAS section SDM memory map. Required flow: (a) Poll on the SdmCmdReady bit (i.e. SdmCmdReady=1). (b) Write SdmCmdAddr, SdmCmdDataLsb and SdmCmdDataMsb (c) Send SdmCmdGo command: (1) wr value=1; and then (2) wr value=0.
#define QM_REG_SDMCMDREADY 0x2f1e10UL //Access:R DataWidth:0x1 SDM command Ready. This reg is used for sending SDM command through the RBC. See command description in the QM EAS section SDM memory map. Required flow: (a) Poll on the SdmCmdReady bit (i.e. SdmCmdReady=1). (b) Write SdmCmdAddr, SdmCmdDataLsb and SdmCmdDataMsb (c) Send SdmCmdGo command: (1) wr value=1; and then (2) wr value=0. Chips: BB_A0 BB_B0 K2
#define QM_REG_SDMCMDREADY 0x2f1e10UL //Access:R DataWidth:0x1 // SDM command Ready. This reg is used for sending SDM command through the RBC. See command description in the QM EAS section SDM memory map. Required flow: (a) Poll on the SdmCmdReady bit (i.e. SdmCmdReady=1). (b) Write SdmCmdAddr, SdmCmdDataLsb and SdmCmdDataMsb (c) Send SdmCmdGo command: (1) wr value=1; and then (2) wr value=0.
#define QM_REG_SDMCMDREADY 0x2f1e10UL //Access:R DataWidth:0x1 // SDM command Ready. This reg is used for sending SDM command through the RBC. See command description in the QM EAS section SDM memory map. Required flow: (a) Poll on the SdmCmdReady bit (i.e. SdmCmdReady=1). (b) Write SdmCmdAddr, SdmCmdDataLsb and SdmCmdDataMsb (c) Send SdmCmdGo command: (1) wr value=1; and then (2) wr value=0.
#define QM_REG_SDMCMDREADY 0x2f1e10UL //Access:R DataWidth:0x1 // SDM command Ready. This reg is used for sending SDM command through the RBC. See command description in the QM EAS section SDM memory map. Required flow: (a) Poll on the SdmCmdReady bit (i.e. SdmCmdReady=1). (b) Write SdmCmdAddr, SdmCmdDataLsb and SdmCmdDataMsb (c) Send SdmCmdGo command: (1) wr value=1; and then (2) wr value=0.