QM_REG_PF_EN
#define QM_REG_PF_EN 0x16e70cUL //ACCESS:RW DataWidth:0x1 SPLIT:8 Description: PF enable vector. Bit per PF. If set the PF is enabled
#define QM_REG_PF_EN 0x2f2ea4UL //Access:RW DataWidth:0x1 // PF enable vector. Bit per PF. If set the PF is enabled.
#define QM_REG_PF_EN 0x2f2ea4UL //Access:RW DataWidth:0x1 PF enable vector. Bit per PF. If set the PF is enabled. Chips: BB_A0 BB_B0 K2
#define QM_REG_PF_EN 0x2f2ea4UL //Access:RW DataWidth:0x1 // PF enable vector. Bit per PF. If set the PF is enabled.
#define QM_REG_PF_EN 0x2f2ea4UL //Access:RW DataWidth:0x1 // PF enable vector. Bit per PF. If set the PF is enabled.
#define QM_REG_PF_EN 0x2f2ea4UL //Access:RW DataWidth:0x1 // PF enable vector. Bit per PF. If set the PF is enabled.