Symbol: QM_REG_DBG_FORCE_VALID
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
47128
#define QM_REG_DBG_FORCE_VALID 0x2f2e80UL //Access:RW DataWidth:0x4 // Debug only: For dbgmux usage (debug data that goes from QM to the DBG block) - forcing valid.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
43227
#define QM_REG_DBG_FORCE_VALID 0x2f2e80UL //Access:RW DataWidth:0x4 Debug only: For dbgmux usage (debug data that goes from QM to the DBG block) - forcing valid. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
46109
#define QM_REG_DBG_FORCE_VALID 0x2f2e80UL //Access:RW DataWidth:0x4 // Debug only: For dbgmux usage (debug data that goes from QM to the DBG block) - forcing valid.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
46109
#define QM_REG_DBG_FORCE_VALID 0x2f2e80UL //Access:RW DataWidth:0x4 // Debug only: For dbgmux usage (debug data that goes from QM to the DBG block) - forcing valid.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
46109
#define QM_REG_DBG_FORCE_VALID 0x2f2e80UL //Access:RW DataWidth:0x4 // Debug only: For dbgmux usage (debug data that goes from QM to the DBG block) - forcing valid.