Symbol: PSWRQ2_REG_ILT_MEMORY
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
42801
#define PSWRQ2_REG_ILT_MEMORY 0x260000UL //Access:WB DataWidth:0x35 // Internal lookup table for logical to physical address translation. Re-instantiated in E4 due to size increase.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
38634
#define PSWRQ2_REG_ILT_MEMORY 0x260000UL //Access:WB DataWidth:0x35 Internal lookup table for logical to physical address translation. Re-instantiated in E4 due to size increase. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
41834
#define PSWRQ2_REG_ILT_MEMORY 0x260000UL //Access:WB DataWidth:0x35 // Internal lookup table for logical to physical address translation. Re-instantiated in E4 due to size increase.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
41834
#define PSWRQ2_REG_ILT_MEMORY 0x260000UL //Access:WB DataWidth:0x35 // Internal lookup table for logical to physical address translation. Re-instantiated in E4 due to size increase.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
41834
#define PSWRQ2_REG_ILT_MEMORY 0x260000UL //Access:WB DataWidth:0x35 // Internal lookup table for logical to physical address translation. Re-instantiated in E4 due to size increase.