PSWHST2_REG_DBG_DWORD_ENABLE
#define PSWHST2_REG_DBG_DWORD_ENABLE 0x29e05cUL //Access:RW DataWidth:0x4 // DBMUX register. Bit mask for enabling dword (128bit line) / qword (256bit line) in the selected line (before shift).for selecting a line to output
#define PSWHST2_REG_DBG_DWORD_ENABLE 0x29e05cUL //Access:RW DataWidth:0x4 DBMUX register. Bit mask for enabling dword (128bit line) / qword (256bit line) in the selected line (before shift).for selecting a line to output Chips: BB_A0 BB_B0 K2
#define PSWHST2_REG_DBG_DWORD_ENABLE 0x29e05cUL //Access:RW DataWidth:0x4 // DBMUX register. Bit mask for enabling dword (128bit line) / qword (256bit line) in the selected line (before shift).for selecting a line to output
#define PSWHST2_REG_DBG_DWORD_ENABLE 0x29e05cUL //Access:RW DataWidth:0x4 // DBMUX register. Bit mask for enabling dword (128bit line) / qword (256bit line) in the selected line (before shift).for selecting a line to output
#define PSWHST2_REG_DBG_DWORD_ENABLE 0x29e05cUL //Access:RW DataWidth:0x4 // DBMUX register. Bit mask for enabling dword (128bit line) / qword (256bit line) in the selected line (before shift).for selecting a line to output