BRB_REG_MAIN_TC_FULL_XOFF_THRESHOLD_0
#define BRB_REG_MAIN_TC_FULL_XOFF_THRESHOLD_0 0x340c00UL //Access:RW DataWidth:0xe // If the area guaranteed for that TC is full - the number of free blocks in the shared and headroom areas below which FULL is asserted for the TC. This is configuration for main ports. Minimal value is 33 for dual engine device and 25 for single engine device. Reset value is right for 128B block size only. It should be twice smaller for 256B block size. ::s/BLK_WDTH/13/g in Data Width::/PAUSE_EN/d in Existance.
#define BRB_REG_MAIN_TC_FULL_XOFF_THRESHOLD_0 0x340c00UL //Access:RW DataWidth:0xd If the area guaranteed for that TC is full - the number of free blocks in the shared and headroom areas below which FULL is asserted for the TC. This is configuration for main ports. Minimal value is 33 for dual engine device and 25 for single engine device. Reset value is right for 128B block size only. It should be twice smaller for 256B block size. ::s/BLK_WDTH/13/g in Data Width::/PAUSE_EN/d in Existance. Chips: BB_A0 BB_B0 K2
#define BRB_REG_MAIN_TC_FULL_XOFF_THRESHOLD_0 0x340c00UL //Access:RW DataWidth:0xd // If the area guaranteed for that TC is full - the number of free blocks in the shared and headroom areas below which FULL is asserted for the TC. This is configuration for main ports. Minimal value is 33 for dual engine device and 25 for single engine device. Reset value is right for 128B block size only. It should be twice smaller for 256B block size. ::s/BLK_WDTH/13/g in Data Width::/PAUSE_EN/d in Existance.
#define BRB_REG_MAIN_TC_FULL_XOFF_THRESHOLD_0 0x340c00UL //Access:RW DataWidth:0xe // If the area guaranteed for that TC is full - the number of free blocks in the shared and headroom areas below which FULL is asserted for the TC. This is configuration for main ports. Minimal value is 33 for dual engine device and 25 for single engine device. Reset value is right for 128B block size only. It should be twice smaller for 256B block size. ::s/BLK_WDTH/13/g in Data Width::/PAUSE_EN/d in Existance.
#define BRB_REG_MAIN_TC_FULL_XOFF_THRESHOLD_0 0x340c00UL //Access:RW DataWidth:0xd // If the area guaranteed for that TC is full - the number of free blocks in the shared and headroom areas below which FULL is asserted for the TC. This is configuration for main ports. Minimal value is 33 for dual engine device and 25 for single engine device. Reset value is right for 128B block size only. It should be twice smaller for 256B block size. ::s/BLK_WDTH/13/g in Data Width::/PAUSE_EN/d in Existance.