Symbol: PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
11897
#define PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR 0x9474UL //ACCESS:W DataWidth:0x20 Description: Was_error indication dirty bits clear for VFs 96 to 127. MCP writes 1 to a bit in this register in order to clear the corresponding bit in was_error_vf_127_96 register.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
44735
#define PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR 0x2aa124UL //Access:W DataWidth:0x20 // Was_error indication dirty bits clear for VFs 96 to 127. MCP writes 1 to a bit in this register in order to clear the corresponding bit in was_error_vf_127_96 register. The register is split per path but VFID is global. Each path can reset only the VFs belong to it.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
40639
#define PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR 0x2aa124UL //Access:W DataWidth:0x20 Was_error indication dirty bits clear for VFs 96 to 127. MCP writes 1 to a bit in this register in order to clear the corresponding bit in was_error_vf_127_96 register. The register is split per path but VFID is global. Each path can reset only the VFs belong to it. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
43730
#define PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR 0x2aa124UL //Access:W DataWidth:0x20 // Was_error indication dirty bits clear for VFs 96 to 127. MCP writes 1 to a bit in this register in order to clear the corresponding bit in was_error_vf_127_96 register. The register is split per path but VFID is global. Each path can reset only the VFs belong to it.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
43730
#define PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR 0x2aa124UL //Access:W DataWidth:0x20 // Was_error indication dirty bits clear for VFs 96 to 127. MCP writes 1 to a bit in this register in order to clear the corresponding bit in was_error_vf_127_96 register. The register is split per path but VFID is global. Each path can reset only the VFs belong to it.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
43730
#define PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR 0x2aa124UL //Access:W DataWidth:0x20 // Was_error indication dirty bits clear for VFs 96 to 127. MCP writes 1 to a bit in this register in order to clear the corresponding bit in was_error_vf_127_96 register. The register is split per path but VFID is global. Each path can reset only the VFs belong to it.