Symbol: PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL
usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/57712_reg.h
11561
#define PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL 0x90a8UL //ACCESS:R DataWidth:0x15 Description: Details of first Invalidation Completion message submitted during a TX error condition. [2:0] - PFID. [3] - VF_VALID. [9:4] - VFID. [14:10] - ITAG Index. [19:16] - Error type - [16] - Indicates was_error was set; [17] - Indicates BME was cleared; [18] - Indicates FID_enable was cleared; [19] - Indicates VF with parent PF FLR_request or IOV_disable_request dirty bit is set. [20] valid - indicates if there was an Invalidation Completion message submitted during a TX error condition since the last time this register was cleared.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
44751
#define PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL 0x2aa164UL //Access:R DataWidth:0x18 // Details of first Invalidation Completion or MCTP message submitted during a TX error condition. [3:0] - PFID. [11:4] - VFID. [12] - VF_VALID. [17:13] - ITAG Index. [21:18] - Error type - [18] - Indicates was_error was set; [19] - Indicates BME was cleared; [20] - Indicates FID_enable was cleared; [21] - Indicates VF with parent PF FLR_request or IOV_disable_request dirty bit is set. [22] - 0 indicates ICPL; 1 indicates MCTP. [23] valid - indicates if there was an Invalidation Completion message submitted during a TX error condition since the last time this register was cleared.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
40655
#define PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL 0x2aa164UL //Access:R DataWidth:0x18 Details of first Invalidation Completion or MCTP message submitted during a TX error condition. [3:0] - PFID. [11:4] - VFID. [12] - VF_VALID. [17:13] - ITAG Index. [21:18] - Error type - [18] - Indicates was_error was set; [19] - Indicates BME was cleared; [20] - Indicates FID_enable was cleared; [21] - Indicates VF with parent PF FLR_request or IOV_disable_request dirty bit is set. [22] - 0 indicates ICPL; 1 indicates MCTP. [23] valid - indicates if there was an Invalidation Completion message submitted during a TX error condition since the last time this register was cleared. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
43746
#define PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL 0x2aa164UL //Access:R DataWidth:0x18 // Details of first Invalidation Completion or MCTP message submitted during a TX error condition. [3:0] - PFID. [11:4] - VFID. [12] - VF_VALID. [17:13] - ITAG Index. [21:18] - Error type - [18] - Indicates was_error was set; [19] - Indicates BME was cleared; [20] - Indicates FID_enable was cleared; [21] - Indicates VF with parent PF FLR_request or IOV_disable_request dirty bit is set. [22] - 0 indicates ICPL; 1 indicates MCTP. [23] valid - indicates if there was an Invalidation Completion message submitted during a TX error condition since the last time this register was cleared.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
43746
#define PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL 0x2aa164UL //Access:R DataWidth:0x18 // Details of first Invalidation Completion or MCTP message submitted during a TX error condition. [3:0] - PFID. [11:4] - VFID. [12] - VF_VALID. [17:13] - ITAG Index. [21:18] - Error type - [18] - Indicates was_error was set; [19] - Indicates BME was cleared; [20] - Indicates FID_enable was cleared; [21] - Indicates VF with parent PF FLR_request or IOV_disable_request dirty bit is set. [22] - 0 indicates ICPL; 1 indicates MCTP. [23] valid - indicates if there was an Invalidation Completion message submitted during a TX error condition since the last time this register was cleared.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
43746
#define PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL 0x2aa164UL //Access:R DataWidth:0x18 // Details of first Invalidation Completion or MCTP message submitted during a TX error condition. [3:0] - PFID. [11:4] - VFID. [12] - VF_VALID. [17:13] - ITAG Index. [21:18] - Error type - [18] - Indicates was_error was set; [19] - Indicates BME was cleared; [20] - Indicates FID_enable was cleared; [21] - Indicates VF with parent PF FLR_request or IOV_disable_request dirty bit is set. [22] - 0 indicates ICPL; 1 indicates MCTP. [23] valid - indicates if there was an Invalidation Completion message submitted during a TX error condition since the last time this register was cleared.