Symbol: PGLUE_B_REG_START_INIT_PTT_GTT
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
44255
#define PGLUE_B_REG_START_INIT_PTT_GTT 0x2a8008UL //Access:W DataWidth:0x1 // Writing 1 to this register signals the PGLUE block to start initializing PTT and GTT. Offsets should map to reserved space, pretend should map to the same PF. This register should be initialized by MCP.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
40103
#define PGLUE_B_REG_START_INIT_PTT_GTT 0x2a8008UL //Access:W DataWidth:0x1 Writing 1 to this register signals the PGLUE block to start initializing PTT and GTT. Offsets should map to reserved space, pretend should map to the same PF. This register should be initialized by MCP. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
43285
#define PGLUE_B_REG_START_INIT_PTT_GTT 0x2a8008UL //Access:W DataWidth:0x1 // Writing 1 to this register signals the PGLUE block to start initializing PTT and GTT. Offsets should map to reserved space, pretend should map to the same PF. This register should be initialized by MCP.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
43285
#define PGLUE_B_REG_START_INIT_PTT_GTT 0x2a8008UL //Access:W DataWidth:0x1 // Writing 1 to this register signals the PGLUE block to start initializing PTT and GTT. Offsets should map to reserved space, pretend should map to the same PF. This register should be initialized by MCP.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
43285
#define PGLUE_B_REG_START_INIT_PTT_GTT 0x2a8008UL //Access:W DataWidth:0x1 // Writing 1 to this register signals the PGLUE block to start initializing PTT and GTT. Offsets should map to reserved space, pretend should map to the same PF. This register should be initialized by MCP.