PGLUE_B_REG_CFG_SPACE_A_REQUEST
#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x9010UL //ACCESS:R DataWidth:0x8 Description: Config space A attention dirty bits. Each bit indicates that the corresponding PF generates config space A attention. Set by PXP. Reset by MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits from both paths.
#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x2aa010UL //Access:R DataWidth:0x10 // Config space A attention dirty bits. Each bit indicates that the corresponding PF generates config space A attention. Set by PXP. Reset by MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits from both paths.
#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x2aa010UL //Access:R DataWidth:0x10 Config space A attention dirty bits. Each bit indicates that the corresponding PF generates config space A attention. Set by PXP. Reset by MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits from both paths. Chips: BB_A0 BB_B0 K2
#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x2aa010UL //Access:R DataWidth:0x10 // Config space A attention dirty bits. Each bit indicates that the corresponding PF generates config space A attention. Set by PXP. Reset by MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits from both paths.
#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x2aa010UL //Access:R DataWidth:0x10 // Config space A attention dirty bits. Each bit indicates that the corresponding PF generates config space A attention. Set by PXP. Reset by MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits from both paths.
#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x2aa010UL //Access:R DataWidth:0x10 // Config space A attention dirty bits. Each bit indicates that the corresponding PF generates config space A attention. Set by PXP. Reset by MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits from both paths.