Symbol: NIG_REG_TX_LB_GLBRATELIMIT_INC_VALUE
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
55273
#define NIG_REG_TX_LB_GLBRATELIMIT_INC_VALUE 0x501f24UL //Access:RW DataWidth:0x20 // Increment VALUE for the global rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration). This is the amount of data allowed in the configured increment period *inc_period to get the desired data rate.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
50619
#define NIG_REG_TX_LB_GLBRATELIMIT_INC_VALUE 0x501f24UL //Access:RW DataWidth:0x20 Increment VALUE for the global rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration). This is the amount of data allowed in the configured increment period *inc_period to get the desired data rate. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
53808
#define NIG_REG_TX_LB_GLBRATELIMIT_INC_VALUE 0x501f24UL //Access:RW DataWidth:0x20 // Increment VALUE for the global rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration). This is the amount of data allowed in the configured increment period *inc_period to get the desired data rate.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
53808
#define NIG_REG_TX_LB_GLBRATELIMIT_INC_VALUE 0x501f24UL //Access:RW DataWidth:0x20 // Increment VALUE for the global rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration). This is the amount of data allowed in the configured increment period *inc_period to get the desired data rate.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
53808
#define NIG_REG_TX_LB_GLBRATELIMIT_INC_VALUE 0x501f24UL //Access:RW DataWidth:0x20 // Increment VALUE for the global rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration). This is the amount of data allowed in the configured increment period *inc_period to get the desired data rate.