NIG_REG_TX_EDPM_CTRL
#define NIG_REG_TX_EDPM_CTRL 0x501f0cUL //Access:RW DataWidth:0x9 // Multi Field Register.
#define NIG_REG_TX_EDPM_CTRL 0x501f0cUL //Access:RW DataWidth:0x9 Multi Field Register. Chips: BB_A0 BB_B0 K2
#define NIG_REG_TX_EDPM_CTRL 0x501f0cUL //Access:RW DataWidth:0x9 // Multi Field Register.
#define NIG_REG_TX_EDPM_CTRL 0x501f0cUL //Access:RW DataWidth:0x9 // Multi Field Register.
#define NIG_REG_TX_EDPM_CTRL 0x501f0cUL //Access:RW DataWidth:0x9 // Multi Field Register.