NIG_REG_PKT_PRIORITY_TO_TC
#define NIG_REG_PKT_PRIORITY_TO_TC 0x501ba4UL //Access:RW DataWidth:0x20 // Eight 4-bit configurations for specifying which TC (0-15 for future expansion) each priorty is to be mapped to. Bits 3:0 specify the TC for priority 0. Bits 31:28 specify the TC for priority 7.
#define NIG_REG_PKT_PRIORITY_TO_TC 0x501ba4UL //Access:RW DataWidth:0x20 Eight 4-bit configurations for specifying which TC (0-15 for future expansion) each priorty is to be mapped to. Bits 3:0 specify the TC for priority 0. Bits 31:28 specify the TC for priority 7. Chips: BB_A0 BB_B0 K2
#define NIG_REG_PKT_PRIORITY_TO_TC 0x501ba4UL //Access:RW DataWidth:0x20 // Eight 4-bit configurations for specifying which TC (0-15 for future expansion) each priorty is to be mapped to. Bits 3:0 specify the TC for priority 0. Bits 31:28 specify the TC for priority 7.
#define NIG_REG_PKT_PRIORITY_TO_TC 0x501ba4UL //Access:RW DataWidth:0x20 // Eight 4-bit configurations for specifying which TC (0-15 for future expansion) each priorty is to be mapped to. Bits 3:0 specify the TC for priority 0. Bits 31:28 specify the TC for priority 7.
#define NIG_REG_PKT_PRIORITY_TO_TC 0x501ba4UL //Access:RW DataWidth:0x20 // Eight 4-bit configurations for specifying which TC (0-15 for future expansion) each priorty is to be mapped to. Bits 3:0 specify the TC for priority 0. Bits 31:28 specify the TC for priority 7.