Symbol: NIG_REG_LB_TCRATELIMIT_MAX_VALUE_0
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
54904
#define NIG_REG_LB_TCRATELIMIT_MAX_VALUE_0 0x501580UL //Access:RW DataWidth:0x20 // Upper bound VALUE for the per-TC rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
50250
#define NIG_REG_LB_TCRATELIMIT_MAX_VALUE_0 0x501580UL //Access:RW DataWidth:0x20 Upper bound VALUE for the per-TC rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration). Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
53439
#define NIG_REG_LB_TCRATELIMIT_MAX_VALUE_0 0x501580UL //Access:RW DataWidth:0x20 // Upper bound VALUE for the per-TC rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
53439
#define NIG_REG_LB_TCRATELIMIT_MAX_VALUE_0 0x501580UL //Access:RW DataWidth:0x20 // Upper bound VALUE for the per-TC rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
53439
#define NIG_REG_LB_TCRATELIMIT_MAX_VALUE_0 0x501580UL //Access:RW DataWidth:0x20 // Upper bound VALUE for the per-TC rate limiter - in term of bytes, cycles, or packets (as selected in the *base_type configuration).