NIG_REG_LB_TCRATELIMIT_CTRL_0
#define NIG_REG_LB_TCRATELIMIT_CTRL_0 0x501520UL //Access:RW DataWidth:0x3 // Multi Field Register.
#define NIG_REG_LB_TCRATELIMIT_CTRL_0 0x501520UL //Access:RW DataWidth:0x3 Multi Field Register. Chips: BB_A0 BB_B0 K2
#define NIG_REG_LB_TCRATELIMIT_CTRL_0 0x501520UL //Access:RW DataWidth:0x3 // Multi Field Register.
#define NIG_REG_LB_TCRATELIMIT_CTRL_0 0x501520UL //Access:RW DataWidth:0x3 // Multi Field Register.
#define NIG_REG_LB_TCRATELIMIT_CTRL_0 0x501520UL //Access:RW DataWidth:0x3 // Multi Field Register.