MISC_REG_SHARED_MEM_ADDR
#define MISC_REG_SHARED_MEM_ADDR 0xa2b4UL //ACCESS:RW DataWidth:0x16 Description: 22 bit GRC address where the scratch-pad of the MCP that is shared with the driver resides
#define MISC_REG_SHARED_MEM_ADDR 0x008c20UL //Access:RW DataWidth:0x17 // 23 bit GRC address where the scratch-pad of the MCP that is shared with the driver resides.
#define MISC_REG_SHARED_MEM_ADDR 0x008c20UL //Access:RW DataWidth:0x17 23 bit GRC address where the scratch-pad of the MCP that is shared with the driver resides. Chips: BB_A0 BB_B0 K2
#define MISC_REG_SHARED_MEM_ADDR 0x008c20UL //Access:RW DataWidth:0x17 // 23 bit GRC address where the scratch-pad of the MCP that is shared with the driver resides.
#define MISC_REG_SHARED_MEM_ADDR 0x008c20UL //Access:RW DataWidth:0x17 // 23 bit GRC address where the scratch-pad of the MCP that is shared with the driver resides.
#define MISC_REG_SHARED_MEM_ADDR 0x008c20UL //Access:RW DataWidth:0x17 // 23 bit GRC address where the scratch-pad of the MCP that is shared with the driver resides.