Symbol: MISC_REG_PORT_MODE
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
33751
#define MISC_REG_PORT_MODE 0x008c00UL //Access:RW DataWidth:0x2 // Port mode. 0 - single port; 1 - 2 ports; 2 - 4 ports. 2 is prohibited configuration in 2 path device. Reset on POR reset.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
30243
#define MISC_REG_PORT_MODE 0x008c00UL //Access:RW DataWidth:0x2 Port mode. 0 - single port; 1 - 2 ports; 2 - 4 ports. 2 is prohibited configuration in 2 path device. Reset on POR reset. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
33719
#define MISC_REG_PORT_MODE 0x008c00UL //Access:RW DataWidth:0x2 // Port mode. 0 - single port; 1 - 2 ports; 2 - 4 ports. 2 is prohibited configuration in 2 path device. Reset on POR reset.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
33719
#define MISC_REG_PORT_MODE 0x008c00UL //Access:RW DataWidth:0x2 // Port mode. 0 - single port; 1 - 2 ports; 2 - 4 ports. 2 is prohibited configuration in 2 path device. Reset on POR reset.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
33719
#define MISC_REG_PORT_MODE 0x008c00UL //Access:RW DataWidth:0x2 // Port mode. 0 - single port; 1 - 2 ports; 2 - 4 ports. 2 is prohibited configuration in 2 path device. Reset on POR reset.